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Research questionHow can complex neural-network graphs be mapped across heterogeneous SoCs to balance inference latency and throughput?Complex neural-network graphs expose parallel operators, but executing them across unlike on-chip processors introduces dependencies and communication costs. Choices that improve pipeline throughput can worsen single-inference latency or energy efficiency.
AI
Inference Optimization
Machine Learning
Research Paper
Small / On-device Models
Technology
Latest papersRecent research connected to this question, newest first.Para-Pipe: Exploiting Hierarchical Operator Parallelism of ML Computational Graphs on SoCsThe evidence concerns pipelined and parallel execution of neural-network graphs on an Amlogic SoC with ARM big.LITTLE CPUs and a GPU, and on a Black Sesame Technology SoC with a deep learning accelerator and two DSPs. Reported comparisons cover throughput, latency, communication overhead, and energy efficiency against purely pipelined and non-pipelined parallel execution.research paper · Sep 3, 2026
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